-20 dB wrote:

Why not approach the matter with little bloodshed? If there is something like the above-mentioned IZhTS5-4/8, with separate segment outputs? In the stash of unused K176IE4 from Soviet times, there was a lot left (a counter/divider by 10 with a seven-segment decoder and a transfer output, used to form units of minutes and hours in an electronic watch, an incomplete analogue - CD4026 - what is the incompleteness, haven’t looked... yet) in classic switching on for LCD control. 4 pcs - 2 per channel, + 2 pcs. 176(561)LE5 or LA7 - one for single pulse shapers (contact bounce suppressors), the second - for forming a meander to “illuminate” the LCD indicator? Of course, the solution on MP is more beautiful, but on garbage it’s cheaper, and can only be solved on the knee... With MP programming, for example, I have a hard time (unless someone hands me a ready-made dump) - it’s easier for me with hardware.

Well, I'm willing to bet here. Let's do the math. For starters, the cost:
1. PIC12LF629 (SOIC-8) - 40 rub. (~$1.15)
2. Display from Motorola S200/S205/T190/T191 - about 90 rubles (~$2.57) In addition, the resolution is 98x64 - draw and write what you want.
3. Bulk (SMD shortcuts, buttons, SMD capacitors, etc.) at a glance - about 50 rubles. (~$1.42)

Total: ~180rub (~$5)

The case, the battery (I would choose the Lo-Pol battery from the same C200 motor scooter - compact, capacious, inexpensive (relatively)) - we don’t count it, since both are needed in both options.

Now your option:

1. LCI5-4/8 - about 50 rubles (~$1.42)
2. K176IE4 (CD4026) - 15 rubles (~0.42$)x4=60 rubles (~1.68$)
3. K176LA7 - 5 rubles (~0.14$)x4=20 rubles (~0.56$)
4. Bulk (SMD shortcuts, buttons, SMD capacitors, etc.) at a glance - about 50 rubles. (~$1.42)

Total: ~180rub (~$5)

What's the benefit?

Now let’s estimate the performance characteristics and functionality:

The version with MK will have consumption maximum 20mA, while in your version, I think 1.5...2 times more. In addition, in your version - the complexity (relative) of a printed circuit board on 7 cases + multi-legged ILC5-4/8 (probably double-sided), the inability to upgrade the device (add or change functionality) without getting into the circuit (only at the software level), the lack of possibility organize memory for measurements (counting), power supply of at least 5V (with less you will not swing the LCI), weight and dimensions. There are many more arguments that can be given. Now the option with MK. I already wrote about the current consumption - 20mA max. + the possibility of a sleep mode (consumption - 1...5 mA (mainly LCD)), the complexity of the board for one 8-leg microcircuit and a 5-pin connector for a Motorola LCD is ridiculous even to say. Flexibility (you can do something like this programmatically, without changing the circuit or board - it will make your hair stand on end), the information content of the 98x64 graphic display cannot be compared with the 4.5 digits of a 7-segment LCI. power supply - 3...3.5V (you can even use a CR2032 tablet, but Li-Pol from a mabyl is still better). The ability to organize multi-cell memory for the measurement results (counts) of the device - again, only at the software level without interfering with the circuit and board. And finally - the dimensions and weight cannot be compared with your option. The argument “I don’t know how to program” will not be accepted - whoever wants to will find a way out. Until yesterday, I did not know how to work with the display from the Motorola S205 mobile phone. Now I can. A day has passed. Because I NEED it. In the end, you are right - you can ask someone.)) That's something like this. And it’s not a matter of beauty, but the fact that discrete logic is hopelessly outdated both morally and technically as the main element of circuit design. What required dozens of cases with wild total consumption, complexity of PP and huge dimensions can now be assembled with a 28-40 foot MK easily and naturally - believe me. Now there is even much more information on MK than on discrete logic - and this is quite understandable.

Pulse counter is a serial digital device that provides storage of a word of information and the execution of a counting micro-operation on it, which consists in changing the value of a number in the counter to 1. Essentially, the counter is a set of triggers connected in a certain way. The main parameter of the counter is the counting module. This is the maximum number of single signals that can be counted by the counter. Counters are designated by ST (from the English counter).

Pulse counters are classified

● by count modulo:
. BCD;
. binary;
. with an arbitrary constant counting module;
. with variable counting module;
. in the direction of the account:
. summative;
. subtractive;
. reversible;
● by the method of forming internal connections:
. with sequential transfer;
. with parallel transfer;
. with combined transfer;
. ring.

Summing pulse counter

Consider a summing counter (Fig. 3.67, A). Such a counter is built on four JK flip-flops, which, if there is a logical signal “1” at both inputs, switch when negative voltage drops appear at the synchronization inputs.

Timing diagrams illustrating the operation of the counter are shown in Fig. 3.67, b. Ksi denotes the counting modulus (pulse counting coefficient). The state of the left trigger corresponds to the least significant digit of the binary number, and the right one corresponds to the most significant digit. In the initial state, all flip-flops are set to logical zeros. Each trigger changes its state only at the moment when it is affected by a negative voltage drop.

Thus, this counter implements the summation of input pulses. From the timing diagrams it can be seen that the frequency of each subsequent pulse is two times less than the previous one, that is, each trigger divides the frequency of the input signal by two, which is used in frequency dividers.

Three-bit subtractor counter with serial carry

Let's consider a three-bit subtracting counter with sequential carry, the circuit and timing diagrams of which are shown in Fig. 3.68.
(xtypo_quote)The counter uses three JK flip-flops, each of which operates in T-flip-flop mode (flip-flop with a counting input).(/xtypo_quote)

Logic 1s are applied to the inputs J and K of each flip-flop, therefore, upon the arrival of the falling edge of the pulse supplied to its synchronization input C, each flip-flop changes the previous state. Initially, the signals at the outputs of all flip-flops are equal to 1. This corresponds to storing the binary number 111 or the decimal number 7 in the counter. After the end of the first pulse F, the first flip-flop changes state: the signal Q 1 becomes equal to 0, a ¯ Q 1 − 1.

The remaining triggers do not change their state. After the end of the second synchronization pulse, the first trigger changes its state again, moving to state 1, (Q x = 0). This ensures a change in the state of the second trigger (the second trigger changes state with some delay relative to the end of the second synchronization pulse, since its overturning requires time corresponding to the time of operation of itself and the first trigger).

After the first pulse F, the counter stores the state 11O. Further changes in the counter state occur in the same way as described above. After state 000, the counter goes back to state 111.

Three-digit self-stopping subtracting counter with serial carry

Consider a three-bit self-stopping subtractive counter with sequential carry (Fig. 3.69).

After the counter transitions to state 000, a logical 0 signal appears at the outputs of all flip-flops, which is fed through an OR logic element to the inputs J and K of the first flip-flop, after which this flip-flop exits the T-flip-flop mode and stops responding to F pulses.

Three-bit up/down counter with serial carry

Consider a three-bit up/down counter with sequential carry (Fig. 3.70).

In subtraction mode, the input signals must be applied to the Tv input. In this case, a logical 0 signal is supplied to the T c input. Let all flip-flops be in state 111. When the first signal arrives at the T c input, a logical 1 appears at the T input of the first flip-flop, and it changes its state. After this, a logical 1 signal appears at its inverse input. When a second pulse arrives at input T, a logical 1 will appear at the input of the second trigger, so the second trigger will change its state (the first trigger will also change its state upon arrival of the second pulse). Further changes in state occur in a similar way. In addition mode, the counter operates similarly to a 4-bit adding counter. In this case, the signal is supplied to the T c input. A logical 0 is applied to the T input.
As an example, consider microcircuits of reversing counters (Fig: 3.71) with parallel transfer of the 155 series (TTL):
● IE6 – binary decimal up/down counter;
● IE7 – binary up/down counter.

The counting direction is determined by which pin (5 or 4) the pulses are sent to. Inputs 1, 9, 10, 15 are informational, and input 11 is used for pre-recording. These 5 inputs allow pre-recording to the counter (preset). To do this, you need to submit the appropriate data to the information inputs, and then apply a low-level write pulse to input 11, and the counter will remember the number. Input 14 is the O setting input when a high voltage level is applied. To build counters of larger capacity, forward and reverse transfer outputs are used (pins 12 and 13, respectively). From pin 12 the signal should be fed to the forward counting input of the next stage, and from pin 13 to the downward counting input.

From standard functional units of digital technology, it is not difficult to assemble an electronic stopwatch counter, similar to those produced for school physics classrooms. These devices use the pulse-counting method of time measurement, which consists in measuring the number of pulses whose repetition period is known. Such devices contain the following main components: a counting pulse generator, a control circuit (in the simplest case, its role is played by the “Start” button), a binary decimal counter, decoders and indicators. The last three nodes form a conversion decade, modeling one decimal place. It should be noted that measuring time using the pulse-counting method is accompanied by an inevitable error equal to a counting unit. This is due to the fact that the device will record the same number of pulses and, therefore, show the same time if the counting is stopped immediately after the arrival of the last pulse or just before the arrival of the previous pulse. In this case, the error will take the greatest value, equal to the time between two adjacent

Rice. 172. Recalculation decade

impulses. If you reduce the pulse repetition period and introduce additional counter digits, you can increase the measurement accuracy by the required number.

One decade of a stopwatch counter is shown in Figure 172. It consists of a binary-decimal counter on a decoder and an indicator on a neon lamp. To power the indicator, high voltage is required, therefore, according to safety regulations, the device must be used by a supervisor. The circuit uses a decoder specifically designed to work with a high-voltage indicator. Instead of a lamp, you can use lamps of other types: designed for a supply voltage of 200 V and an indication current. The microcircuit consists of a trigger with a counting input (input and a trigger divider by 5 (input). When connecting the output of a counting trigger (output 1) with the input of the divider, a binary-decimal counter. It responds to the falling edge of a positive pulse or to a negative voltage step applied to the input. In the legend, the counting edge is sometimes shown as an arrow directed towards the IC if it responds to a positive voltage step, or an arrow directed away from the IC. it reacts to a negative voltage drop.

To control the operation of the counting decade, three buttons and a switch are used. Before the counting of the decade begins

is set to zero using the “Set” button. O”, in this case a logical 1 is supplied to the counter inputs. Then the switch selects the source of the counting pulses - it can be either a trigger or a multivibrator. In the “counting mechanical closures” mode, when the button is pressed and released sequentially, binary-decimal counting occurs and the indicator lights up sequentially, numbers 1, 2, 3, etc. until number 9, then number 0 lights up and the counting is repeated. In the pulse counting mode, the input of the counter receives pulses from a multivibrator assembled according to the already known circuit in Fig. 168). To measure time in seconds, the pulse frequency must be 1 Hz. It is set by a variable resistor and a capacitance equal to

To obtain a multi-bit binary-decimal counter, they are switched on sequentially, i.e. the output of the first is connected to the input of the second, the output of the second is connected to the input of the third, etc. To set the multi-bit counter to the zero state, the inputs are combined and connected to the “Set” button. 0".

If, for example, the device is intended to be used in physics lessons, then time must be measured in a fairly wide range - from 0.001 to 100 s. To do this, the generator must have a frequency and the counter must consist of five decimal places. In this case, the digital indicator readings will look like this: 00.000; 00.001; 00.002, etc. up to 99.999 s.

The scope of application of a training counter-stopwatch can be significantly expanded if two additional devices are introduced into it - a non-contact control unit and a time delay unit. The first block must provide automatic and inertia-free switching on and off of the device. To do this, you can use the already known photo relay circuit (Fig. 76), selecting the desired sensitivity and matching the voltage of the power supplies. The control circuit must have two photosensors - one is used to turn on and the other to turn off the stopwatch counter at the moments when the rays intersect with a moving body. Knowing the distance between the photo sensors and the stopwatch readings, it is easy to calculate the speed of the body. The add-on unit uses two photocurrent amplifiers. Their output signals control the operation of a counting trigger, one of the outputs of which is connected to the stopwatch input through a transistor switch.

Other examples of the use of electronic meters can also be given. For example, a machine that simulates a game of dice consists of the already discussed decade of

And a neon lamp controlled by multivibrator pulses (see Fig. 168, 172). Players take turns pressing the button that interrupts the count. The one whose indicator shows the higher number wins. The moment the counter stops, as well as the moment the cube with points from 1 to 6 stops, is determined by random reasons, therefore the counting decade together with the multivibrator is an electronic random number sensor. Let's give more examples of its use in various gaming situations.

When checking the reaction speed of players, a resistor sets a certain frequency of operation of the multivibrator and the speed at which the indicator numbers change (see Fig. 168 and 172). Participants in the game are asked to press the multivibrator button each time the indicator shows a certain, pre-selected number. The higher the switching frequency, the more difficult it is to fulfill this condition. The slowest ones are eliminated first; the winner is the player with the best reaction. In another, more difficult version of the game, you need to continue pressing the button at a pace set by the judge after the indicator disappears. To do this, close it with a mechanical curtain or turn it off with a button

A counting decade together with a multivibrator is especially convenient to use in games if its power supply is made autonomous, that is, not connected to the network. In this case, a seven-segment LED indicator controlled by an integrated circuit decoder is used. We are already familiar with this microcircuit and indicator (Fig. 150, 163). The multivibrator and counter circuits remain unchanged. The circuit of a random number sensor operating from a 5 V source is shown in Figure 173.

An example of a more complex device that operates on the basis of an electric meter is a time delay unit, or timer. Figure 174 shows a schematic diagram of a timer that allows you to turn on various loads for a time from 0 to 999 s. It consists of a three-digit decimal counter assembled on a microcircuit of three decoders on a multivibrator chip and a control circuit on a microcircuit, as well as a microcircuit. The source of counting pulses is a multivibrator tuned to a frequency of 1 Hz. Its pulses are fed to the input of a three-digit decimal counter. Binary codes from each digit are fed to decoders. At their outputs, zero signals appear sequentially as they arrive at the inputs

Rice. 173. Recalculation decade with LED indicator

corresponding binary codes. Setting the required time delay is carried out by switches connecting the outputs of the decoder with the elements of the microcircuit. The inputs of the elements And are connected in pairs to obtain an element. The switch sets units of seconds, the switch tens of seconds and the switch hundreds of seconds. If, for example, the switches are connected to pins 2, 3 and 7 of the decoder, then there will be three 0s at the inputs of the OR-NOT element only at the moment when the counter records 237 pulses or a period of time equal to 237 seconds has passed since the start of counting. In this case, a 1 signal will appear at the output of the OR-NOT element. Until this moment, for all binary codes of the counter, the output of the logical element was a zero signal.

The timer control circuit works as follows. The “Stop” button is first pressed; as a result, the RS trigger assembled on the microcircuit is set to the zero state. From the direct output, the zero voltage level is supplied to a 1/77 transistor, in the emitter circuit of which the electromagnetic relay winding is connected. The transistor and relay are off. At the same time, a high level appears at inverse output 6, which serves as a reset signal for the counter. When you press the “Start” button, the RS trigger goes into the single state, and 3 appears on the direct output. high voltage level, sufficient to open the 1/77 transistor and operate the relay. Its contacts close the load power supply circuit. Simultaneously

(click to view scan)

the zero voltage level removed from the inverse output of the trigger “opens” the counter. The counter operates until output signals corresponding to the dialed number appear at the decoder outputs. In this case, as already mentioned, a single signal appears at the output, which is fed through the inverter to the input of the trigger. It is set to the zero state and, accordingly, the transistor, electromagnetic relay and load are turned off. The counter is set to zero.

The timer will show the current time in seconds if LEDs are connected to the decoder outputs. Time counting will become more convenient if the binary decimal codes of the counters are supplied to decoders working in conjunction with seven-segment indicators

Operating principle

The initial state is the zero level at all trigger outputs (Q 1 – Q 3), i.e. digital code 000. In this case, the most significant digit is the output Q 3. To transfer all flip-flops to the zero state, the inputs of the R flip-flops are combined and the required voltage level is applied to them (i.e., a pulse that resets the flip-flops). This is essentially a reset. Input C receives clock pulses that increase the digital code by one, i.e. after the arrival of the first pulse, the first trigger switches to state 1 (code 001), after the arrival of the second pulse, the second trigger switches to state 1, and the first to state 0 (code 010), then the third, etc. As a result, such a device can count up to 7 (code 111), since 2 3 – 1 = 7. When all the outputs of the triggers are set to ones, they say that the counter is overflowed. After the arrival of the next (ninth) pulse, the counter will reset to zero and everything will start from the beginning. In the graphs, changes in trigger states occur with a certain delay t h. At the third digit the delay is already tripled. The delay that increases with the number of bits is a disadvantage of counters with serial transfer, which, despite their simplicity, limits their use in devices with a small number of bits.

Classification of meters

Counters are devices for counting the number of pulses (commands) received at their input, storing and storing the counting result, and issuing this result. The main parameter of the counter is the counting module (capacity) Kс. This value is equal to the number of stable states of the counter. After the arrival of the Kc pulses, the counter returns to its original state. For binary counters Kс = 2 m, where m is the number of counter bits.

In addition to Kc, important characteristics of the meter are the maximum counting frequency fmax and the settling time tset, which characterize the speed of the meter.

Tst is the duration of the transition process of switching the counter to a new state: tset = mttr, where m is the number of digits, and ttr is the trigger switching time.

Fmax is the maximum frequency of input pulses at which pulse loss does not occur.

By type of operation:

– Summing;

– Subtractive;

– Reversible.

In a summing counter, the arrival of each input pulse increases the counting result by one, in a subtractive counter it decreases by one; In reversing counters, both summation and subtraction can occur.

By structural organization:

– consistent;

– parallel;

– series-parallel.

In a serial counter, the input pulse is supplied only to the input of the first digit; the output pulse of the preceding digit is supplied to the inputs of each subsequent digit.

In a parallel counter, with the arrival of the next counting pulse, switching of triggers upon transition to a new state occurs simultaneously.

The series-parallel circuit includes both of the previous options.

In order of state changes:

– with a natural order of counting;

– with an arbitrary counting order.

Modulo counting:

– binary;

– non-binary.

The counting module of a binary counter is Kc=2, and the counting module of a non-binary counter is Kc= 2m, where m is the number of counter bits.

Summing serial counter

Fig.1. Summing serial 3-bit counter.

The triggers of this counter are triggered by the falling edge of the counting pulse. The input of the high digit of the counter is connected to the direct output (Q) of the low adjacent digit. The timing diagram of the operation of such a counter is shown in Fig. 2. At the initial moment of time, the states of all flip-flops are equal to log.0, respectively, at their direct outputs there is log.0. This is achieved by means of a short-term log.0 applied to the inputs of asynchronous setting of flip-flops to log.0. The general state of the counter can be characterized by a binary number (000). During counting, logic 1 is maintained at the inputs of asynchronous trigger installation in log.1. After the arrival of the trailing edge of the first pulse, the 0-bit switches to the opposite state - log.1. The leading edge of the counting pulse appears at the 1-bit input. Counter status (001). After the falling edge of the second pulse arrives at the input of the counter, the 0-bit switches to the opposite state - log.0, and the falling edge of the counting pulse appears at the input of the 1-bit, which switches the 1-bit to log.1. The general status of the counter is (010). The next falling edge at the 0-bit input will set it to logic 1 (011), etc. Thus, the counter accumulates the number of input pulses arriving at its input. When 8 pulses arrive at its input, the counter returns to its original state (000), which means the counting coefficient (CFC) of this counter is 8.

Rice. 2. Timing diagram of a serial adding counter.

Subtractive serial counter

The triggers of this counter are triggered by the falling edge. To implement the subtraction operation, the counting input of the high-order digit is connected to the inverse output of the adjacent low-order digit. The triggers are preliminarily set to log.1 (111). The operation of this counter is shown in the timing diagram in Fig. 4.

Rice. 1 Serial subtractive counter

Rice. 2 Timing diagram of a serial subtractive counter

Reversible serial counter

To implement an up/down counter, it is necessary to combine the functions of a adding counter and the functions of a subtracting counter. The diagram of this counter is shown in Fig. 5. The “sum” and “difference” signals are used to control the counting mode. For the summation mode, “sum” = log.1, “0” is short-term log.0; “difference” = log.0, “1” - short-term log.0. In this case, elements DD4.1 and DD4.3 allow the supply of signals from the direct outputs of triggers DD1.1, DD1.2 to the clock inputs of triggers DD1.2, DD2.1 through elements DD5.1 ​​and DD5.2, respectively. In this case, the elements DD4.2 and DD4.4 are closed, there is a log 0 at their outputs, so the action of the inverse outputs does not in any way affect the counting inputs of the flip-flops DD1.2, DD2.1. Thus, the summation operation is implemented. To implement the subtraction operation, log.0 is supplied to the “sum” input, and log.1 to the “difference” input. In this case, elements DD4.2, DD4.4 allow signals from the inverse outputs of triggers DD1.1, DD1.2 to be supplied to the inputs of elements DD5.1, DD5.2, and, accordingly, to the counting inputs of triggers DD1.2, DD2.1. In this case, the elements DD4.1, DD4.3 are closed and the signals from the direct outputs of the triggers DD1.1, DD1.2 do not in any way affect the counting inputs of the triggers DD1.2, DD2.1. Thus, the subtraction operation is implemented.

Rice. 3 Serial up/down 3-bit counter

To implement these counters, you can also use triggers that are triggered by the rising edge of the counting pulses. Then, when summing, a signal from the inverse output of the adjacent low-order bit must be supplied to the counting input of the highest digit, and when subtracting, vice versa, the counting input must be connected to the direct output.

The disadvantage of a serial counter is that as the bit depth increases, the installation time (tset) of this counter increases proportionally. The advantage is ease of implementation.

Rice. 3 – Reversing counter

There are two inputs for counting pulses: “+1” – for increase, “-1” – for decrease. The corresponding input (+1 or -1) is connected to input C. This can be done using an OR circuit if you insert it in front of the first flip-flop (the output of the element is to the input of the first flip-flop, the inputs are to buses +1 and -1). The weird stuff between the triggers (DD2 and DD4) is called the AND-OR element. This element is composed of two AND elements and one OR element, combined in one housing. First, the input signals on this element are logically multiplied, then the result is logically added.

The number of inputs of the AND-OR element corresponds to the number of the digit, i.e. if the third digit, then three inputs, the fourth - four, etc. The logic circuit is a two-position switch controlled by the direct or inverse output of the previous trigger. At log. 1 at the direct output, the counter counts pulses from the “+1” bus (if they arrive, of course), with a log. 1 on the inverse output – from the “-1” bus. The AND elements (DD6.1 and DD6.2) form the transfer signals. At output >7, the signal is generated when code 111 (number 7) and the presence of a clock pulse on bus +1, at the output<0 сигнал формируется при коде 000 и наличии тактового импульса на шине -1.

All this, of course, is interesting, but it looks more beautiful in microcircuit design:

Rice. 4 Four-bit binary counter

Here is a typical preset meter. CT2 means that the counter is binary; if it is decimal, then CT10 is set; if it is binary-decimal, it is CT2/10. Inputs D0 – D3 are called information inputs and are used to write any binary state to the counter. This state will be displayed at its outputs and the countdown will begin from it. In other words, these are preset inputs, or simply presets. Input V is used to enable code recording on inputs D0 – D3, or, as they say, enable preset. This input may also be designated by other letters. Preliminary recording into the counter is made when a write enable signal is sent at the moment the pulse arrives at input C. Input C is clocked. Impulses are pushed here. The triangle means that the counter is triggered by the fall of the pulse. If the triangle is rotated 180 degrees, i.e. with its back towards the letter C, then it is triggered by the edge of the pulse. Input R is used to reset the counter, i.e., when a pulse is applied to this input, logs are set at all counter outputs. 0. The PI input is called carry input. The output p is called the carry output. A signal is generated at this output when the counter overflows (when all outputs are set to logic 1). This signal can be applied to the carry input of the next counter. Then, when the first counter overflows, the second one will switch to the next state. Outputs 1, 2, 4, 8 are simply outputs. They generate a binary code corresponding to the number of pulses received at the input of the counter. If the conclusions have circles, which happens much more often, then they are inverse, i.e. instead of log. 1 is given log. 0 and vice versa. The operation of meters together with other devices will be discussed in more detail later.

Parallel totalizer

The operating principle of this counter is that the input signal containing counting pulses is applied simultaneously to all bits of this counter. And setting the counter to log.0 or log.1 state is controlled by the control circuit. The circuit diagram of this counter is shown in Fig. 6

Rice. 4 Parallel accumulating counter

The counter bits are triggers DD1, DD2, DD3.

Control circuit – element DD4.

The advantage of this counter is its short installation time, which does not depend on the digit capacity of the counter.

The disadvantage is the complexity of the circuit as the counter capacity increases.

Parallel carry counters

To increase performance, a method of simultaneously generating a transfer signal for all bits is used. This is achieved by introducing AND elements, through which clock pulses are sent immediately to the inputs of all bits of the counter.

Rice. 2 – Parallel carry counter and graphs explaining its operation

Everything is clear with the first trigger. A clock pulse will pass to the input of the second trigger only when there is a log at the output of the first trigger. 1 (a feature of the AND circuit), and to the input of the third - when there is a log at the outputs of the first two. 1, etc. The response delay on the third trigger is the same as on the first. Such a counter is called a parallel carry counter. As can be seen from the diagram, as the number of bits increases, the number of logs increases. AND elements, and the higher the rank, the more inputs the element has. This is a disadvantage of such counters.

Development of a schematic diagram

Pulse former

A pulse shaper is a device necessary to eliminate contact bounce that occurs when mechanical contacts are closed, which can lead to improper operation of the circuit.

Figure 9 shows diagrams of pulse formers from mechanical contacts.

Rice. 9 Pulse formers from mechanical contacts.

Display block

LEDs must be used to display the counting result. To carry out such output of information, you can use the simplest scheme. The diagram of the LED display unit is shown in Figure 10.

Rice. 10 LED display unit.

Development of CCS (combination control circuit)

To implement this counter from the TTLSh series of K555 microcircuits, I chose:

two K555TV9 microcircuits (2 JK triggers with installation)

one K555LA4 microcircuit (3 3I-NOT elements)

two K555LA3 microcircuits (4 2I-NOT elements)

one K555LN1 chip (6 inverters)

These chips provide a minimum number of packages on a printed circuit board.

Drawing up a block diagram of the meter

Block diagram is a set of meter blocks that perform some function and ensure normal operation of the meter. Figure 7 shows the block diagram of the meter.

Rice. 7 Block diagram of the meter

The control unit performs the function of sending a signal and controlling triggers.

The counting block is designed to change the state of the counter and save this state.

The display unit displays information for visual perception.

Drawing up a functional diagram of the meter

Functional diagram – internal structure of the meter.

Let's determine the optimal number of triggers for a non-binary counter with a counting coefficient Kc=10.

M = log 2 (Kc) = 4.

M = 4 means to implement a binary decimal counter, 4 flip-flops are needed.

The simplest single-digit pulse counters

The simplest single-digit pulse counter can be a JK flip-flop and a D flip-flop operating in counting mode. It counts input pulses modulo 2 - each pulse switches the trigger to the opposite state. One trigger counts up to two, two connected in series count up to four, n triggers count up to 2n pulses. The counting result is generated in a given code, which can be stored in the counter’s memory or be read by another digital decoder device.

The figure shows the circuit of a three-bit binary pulse counter built on a JK flip-flop ax K155TB1. Mount such a counter on a breadboard panel and connect LED (or transistor - with an incandescent lamp) indicators to the direct outputs of the triggers, as was done before. Apply a series of pulses with a repetition frequency of 1 ... 2 Hz from the test generator to the input C of the first trigger of the counter and plot the operation of the counter using the light signals of the indicators.

If at the initial moment all the triggers of the counter were in the zero state (you can set the button switch SB1 “Set.0”, applying a low level voltage to the input R of the triggers), then upon the decline of the first pulse (Fig. 45.6) the trigger DD1 will switch to single state - a high voltage level will appear at its direct output (Fig. 45, c). The second pulse will switch the DD1 trigger to the zero state, and the DD2-B trigger to the single state (Fig. 45, d). As the third pulse falls, triggers DD1 and DD2 will be in the one state, and trigger DD3 will still be in the zero state. The fourth pulse will switch the first two triggers to the zero state, and the third to the single state (Fig. 45, d). The eighth pulse will switch all triggers to the zero state. When the ninth input pulse falls, the next cycle of operation of the three-digit pulse counter will begin.

Studying the graphs, it is easy to notice that each high digit of the counter differs from the low digit by twice the number of counting pulses. Thus, the period of the pulses at the output of the first trigger is 2 times greater than the period of the input pulses, at the output of the second trigger - 4 times, at the output of the third trigger - 8 times. Speaking in the language of digital technology, such a counter operates in a 1-2-4 weight code. Here, the term “weight” refers to the amount of information received by the counter after setting its triggers to the zero state. In devices and instruments of digital technology, four-digit pulse counters operating in the weight code 1-2-4-8 are most widely used. Frequency dividers count the input pulses to a certain state specified by the counting coefficient, and then form a trigger switching signal to the zero state, again begin counting the input pulses to the specified counting coefficient, etc.

The figure shows the circuit and graphs of the operation of a divider with a counting factor of 5, built on JK flip-flops. Here, the already familiar three-bit binary counter is supplemented with a 2-NOT DD4.1 logic element, which sets the counting factor of 5. It happens like this. During the first four input pulses (after setting the triggers to the zero state using the SB1 “Set 0” button), the device operates as a regular binary pulse counter. In this case, a low voltage level operates at one or both inputs of element DD4.1, so the element is in a single state.

Upon the decline of the fifth pulse, a high voltage level appears at the direct output of the first and third triggers, and therefore at both inputs of the DD4.1 element, switching this logical element to the zero state. At this moment, a short low-level pulse is formed at its output, which is transmitted through the diode VD1 to the R input of all flip-flops and switches them to the initial zero state.

From this moment the next cycle of the counter operation begins. Resistor R1 and diode VD1, introduced into this counter, are necessary in order to prevent the output of element DD4.1 from being shorted to the common wire.

You can check the operation of such a frequency divider by applying pulses with a frequency of 1 ... 2 Hz to the input C of its first trigger, and connecting a light indicator to the output of the DD3 trigger.

In practice, the functions of pulse counters and frequency dividers are performed by specially designed microcircuits with a high degree of integration. In the K155 series, for example, these are counters K155IE1, K155IE2, K155IE4, etc.

In amateur radio developments, the K155IE1 and K155IE2 microcircuits are most widely used. Conventional graphic symbols of these counter microcircuits with the numbering of their outputs are shown in Fig. 47.

The K155IE1 microcircuit (Fig. 47a) is called a ten-day pulse counter, that is, a counter with a counting factor of 10. It contains four triggers connected in series. The output (pin 5) of the microcircuit is the output of its fourth trigger. All flip-flops are set to the zero state by applying a high-level voltage simultaneously to both inputs R (pins 1 and 2), combined according to the AND element circuit (symbol “&”). Counting pulses, which must have a low level, can be applied to inputs C connected together (pins 8 and 9), also combined along I., or to one of them, if at this time the second has a high voltage level. With every tenth input pulse, the counter generates a low-level pulse equal in duration to the input pulse. Microcircuit K155IE2 (Fig. 48b)

Binary-decimal four-digit counter. It also has four flip-flops, but the first one has a separate C1 input (pin 14) and a separate direct output (pin 12). The other three triggers are connected to each other so that they form a divider by 5. When the output of the first trigger (pin 12) is connected to the input C2 (pin 1) of the circuit of the remaining triggers, the microcircuit becomes a divider by 10 (Fig. 48, a), operating in code 1 -2-4-8, which is what the numbers at the outputs of the graphic designation of the microcircuit symbolize. To set the counter triggers to the zero state, a high level voltage is applied to both inputs R0 (pins 2 and 3).

Two combined inputs R0 and four separating outputs of the K155IE2 microcircuit allow you to build frequency dividers with division factors from 2 to 10 without additional elements. For example, if you connect pins 12 and 1, 9 and 2, 8 n 3 (Fig. 48, 6), then the counting factor will be 6, and when connecting pins 12 and 1, 11. 2 and 3 (Fig. 48, c) the counting factor will become 8. This feature of the K155IE2 microcircuit allows it to be used both as a binary pulse counter and as a frequency divider.

A digital pulse counter is a digital unit that counts the pulses arriving at its input. The counting result is generated by the counter in a given code and can be stored for the required time. Counters are built on triggers, and the number of pulses that the counter can count is determined from the expression N = 2 n – 1, where n is the number of triggers, and minus one, because in digital technology 0 is taken as the starting point. Counters are summative when the count goes towards increase, and the subtractive count goes towards decrease. If the counter can switch during operation from summation to subtraction and vice versa, then it is called reversible.

Electrical impulse counters

A counter is a digital device that counts the number of electrical impulses. The counter conversion factor is equal to the minimum number of pulses received at the counter input, after which the states at the counter output begin to repeat. A counter is called summing if after each next pulse the digital code at the counter output increases by one. In a subtractive counter, after each pulse at the counter input, the digital code at the output is reduced by one. Counters in which it is possible to switch from summation mode to subtraction mode are called reversible.

Counters can be pre-installed. In such counters, information from the preset inputs is transferred to the counter outputs by a signal at a special preset input. According to their structure, counters are divided into serial, parallel and parallel-serial. A serial binary counter is formed by a chain of counting flip-flops connected in series. In a parallel counter, counting pulses are applied simultaneously to the inputs all digits of the counter. Parallel counters are faster than serial counters. Parallel-serial counters have high speed and high value

Electrical pulse counters are available in both TTL and CMOS series. As an example of a TTL counter, consider the K155IE5 microcircuit. The functional diagram of the K155IE5 counter is shown in Figure 1.51,a, and its symbol on the circuit diagrams is shown in Figure 1.51,b. The K155IE5 counter actually has two counters: with a conversion factor of two (input C0 and output Q 0) and with a conversion factor of eight (input C1 and outputs Q 1, Q 2, Q 3). A counter with a conversion factor of sixteen is easily obtained by connecting output Q0 to input C1, and pulses are applied to input C0. The timing diagram of the operation of such a counter is shown in Figure 1.52.

Figure 1.53 shows connection diagrams that change the conversion factor of the K155IE5 meter. The counter outputs Q 0, Q 1, Q 2, Q 3 have respectively, weighting coefficients 1, 2, 4, 8. By connecting the outputs Q 1, Q 2 with inputs for setting the counter to zero, we get a counter with a conversion factor of six (Fig. 1.53a). Figure 1.53, b shows the connection diagram for obtaining a conversion factor of ten, and Figure 1.53, c - twelve. However, in the circuits shown in Figures 1.53, a - c, there is no possibility of setting the counters to the zero state.

Figures 1.54, a, b show, respectively, counters with conversion factors six and seven, in which an input is provided for setting the counter to the zero state. Analysis of the operation of the circuits shown in Figures 1.53 - 1.54 shows that to obtain a given conversion factor, those counter outputs whose weighting coefficients add up to the required conversion factor are connected to the inputs of the logic element AND.

Table 1.3 shows the states at the outputs of the counter with a conversion factor of ten after the arrival of each next pulse, and the counter was previously set to zero.

Let's look at some of the CMOS series counters. Figure 1.55 shows the symbol for the K561IE8 microcircuit - a decimal counter with a decoder. The microcircuit has an input for setting to the zero state R, an input for supplying counting pulses of positive polarity CP and an input for supplying counting pulses of negative polarity CN.

The counter switches based on the decline of pulses of positive polarity at the CP input, while there must be a logical one at the CN input. The counter will switch based on the decline of pulses of negative polarity at the CN input if the CP input is logical zero. One of the ten counter outputs always has a logical one. The counter is set to zero when a logical one is applied to input R. When the counter is set to zero, output “0” will be set to a logical one, and all other outputs will be set to logical zeros. K561IE8 chips can be combined into multi-bit counters with serial carry, connecting the carry output of the previous chip to the CN input of the next one. Figure 1.56 shows a diagram of a multi-bit counter based on K561IE10 microcircuits.

The industry produces counters for electronic watches. Let's look at some of them. Figure 1.57 shows the symbol for the K176IE3 microcircuit, and Figure 1.58 shows the K176IE4 microcircuit.

In these figures, the outputs of the microcircuits are shown for the standard indicator segment designation shown in Figure 1.59. These microcircuits differ from each other by the conversion factor.

Figure 1.60 shows a diagram of connecting a luminescent indicator to the outputs of the K176IE4 microcircuit. Connecting the indicator to the outputs of the K176IE3 microcircuit will be similar.

Diagrams for connecting LED indicators to the outputs of the 176IE4 microcircuit are shown in Figures 1.61a and 1.61b. At the S input, a logical zero is set for indicators with a common cathode and a logical one for indicators with a common anode.

A description of the K176IE5, K176IE12, K176IE13, K176IE17, K176IE18, K176ID2, K176ID3 microcircuits and their use in electronic watches can be found in. Microcircuits K176IE12, K176IE13, K176IE17, K176IE18 allow a supply voltage from 3 to 15 V.